Assistant Professor

Electrical & Electronics Engineering

UNIWA, Building Z, Office ZB201

Contact days/time:  Mon: 14:00-15:00,Thur: 13:00-14:00 or by (email) appointment

 

Email : This email address is being protected from spambots. You need JavaScript enabled to view it. 

Brief CV   

Dimitris Metafas was born in Piraeus, Greece, on December 1, 1964. He obtained his Diploma degree with honors, and Ph.D. degree in Electrical and Computer Engineering from the University of Patras, Greece in 1987 and 1993, respectively. 
His expertise is in Real-Time Software development, System-On-a-Chip design, DSP architectures, Wireless Communications, and Hardware/Software co-development methodologies. His current research interests include embedded systems for Broadband services over DSL technology, Content Distribution Networks and Sensor Networks. 
Dimitris Metafas is a member of the Hellenic Game Developers Association, he has participated in a number of game developing projects and he is teaching short professional courses on the field of Game Design and Technologies. 
He is author/co-author of more than 30 papers in International Journals and Conferences.

  Education:


Ph.D. degree in Electrical and Computer Engineering from the University of Patras, Greece in 1993. Diploma degree in Electrical and Computer Engineering from the University of Patras, Greece in 1987.

  Professional experience:


  • 2015 - today: Assistant Professor  Dpt. of Electrical & Electronics Engineering of University of West Attica,
  • 2011 - 2015: Lecturer  Dpt. of Electrical & Electronics Engineering of University of West Attica,
  • 2003 - 2011: Assistant Professor, head of the Embedded Systems Lab ,Athens Information Technology Center of Excellence (AIT)
  • 1995 - 2006: INTRACOM S. A.:Management of Research and Development projects in the area of Microelectronics, System-On-a-Chip (SoC) application specific processors design, Embedded Systems design, and Real-Time software development for Wireless Broadband and Mobile Communications applications. He has participated in many ESPRIT and IST international projects.
  • C1. D. E. Metafas and C. E. Goutis "A floating point pipeline CORDIC processor with extended operation set," Proc. of IEEE International Symposium on Circuits and Systems (ISCAS) 1991, pp. 3066-3069, 1991.
  • C2. D. E. Metafas, G. Krikis, and C. E. Goutis "VLSI design of an 8-bit fixed-point CORDIC processor with extended operation set," Proc. of EUROASIC Conference 1991, pp. 158-161, 1991.
  • C3. D. Soudris, M. Birbas, O. Koufopavlou, D. Metafas, S. Nikolaidis, C. Goutis, and S. Theodoridis "All-digital spectrum analyser based on a parallel algorithm," Proc. MELECON Conference 1991, pp. 408-411, 1991.
  • C4. S. L. Horianopoulos, D. E. Metafas, C. E. Goutis, and T. Deliyannis "A Delta modulation FIR filter High Level Synthesis Tool," Proc. of Fourth ISMM International Conference on Parallel and Distributed Computing and Systems (PDCS) 1991, pp. 95-99, 1991.
  • C5. S. S. Nikolaidis, D. E. Metafas, and C. E. Goutis "CORDIC based pipeline architecture of all-pass filters," Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1917-1920, 1993.
  • C6. E. P. Mariatos, D. E. Metafas, J. A. Hallas and C. E. Goutis "A fast DCT processor based on special purpose CORDIC rotators," Proc. of IEEE International Symposium on Circuits and Systems (ISCAS) 1994, pp. 271-274, 1994.
  • C7. D. E. Metafas, H. C. Karathanasis and S. V. Blionas "Industrial approach in design methodologies for mobile communications systems," Proceedings 7th IEEE Int. Workshop on Rapid System Prototyping, pp. 122-126, 1996.
  • C8. F. Ieromnimon, C. Dre, D. Metafas, C. Drosos, V. Koratzinos, A. Alexopoulou, S. Blionas, "On the Integration of Diverse Testing Strategies in a Low-Power Processor," Design, Automation and Test in Europe Conference 2000, (DATE 2000), Paris, France, March 2000.
  • C9. C. Drosos, M. Zayadine and D. Metafas, "Real-Time Communication Protocol Development Using SDL for an Embedded System On Chip Based on ARM Microcontroller," Proc. 13th Euromicro Conference on Real-Time Systems, pp. 89-94, Delft, Netherlands, June 2001.
  • C10. C. Drosos, C. Dre, D. Metafas, D. Soudris and S. Blionas, "The Low Power Baseband Processing Parts of a Novel Dual Mode Dect/Gsm Terminal," 8th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2001), Malta, September 2001.
  • C11. S. Blionas, K. Masselos, C. Dre, C. Drosos, F. Ieromnimon, T. Pagonis, A. Pneymatikakis, A. Tatsaki, T. Trimis, A. Vontzalidis and D. Metafas "A HIPERLAN/2 - IEEE 802.11a Reconfigurable System-on-Chip," 2002 International Conference on Field Programmable Logic and Applications, (Montpellier, France), Lecture Notes on Computer Science 2438, Springer-Verlag, Berlin Heidelberg, pp. 1080-1083, September 2002.
  • C12. S. Blionas, K. Masselos, C. Dre, F. Ieromnimon, T. Pagonis, A. Pneymatikakis, A. Tatsaki, T. Trimis, A. Vontzalidis and D. Metafas, "Design Story: A Hiperlan2/IEEE802.11x Reconfigurable SoC for indoor WLANs and outdoor wireless links. A pilot project for the future generation configurable wireless communications products," Workshop on Heterogeneous Reconfigurable Systems on Chip, Chances, Application, Trends, April 2002.
  • C13. C. Drosos, L. Bisdounis, D. Metafas, S. Blionas, A. Tatsaki, “A Multi-Level Validation Methodology for Wireless Network Applications,” Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation (Book, proceedings of 14th international workshop on Power and Timing Optimization and Simulation, PATMOS 2004), pp. 332–341, Springer, 2004
  • C14. C. Drosos, D. Metafas and G. Papadopoulos, “A UML-Based Methodology for the System Design of a Wireless LAN Prototype,” 7th IEEE International Symposium on Object-oriented Real-time distributed Computing (ISORC 2004), pp. 45-51, May 2004.
  • C15. V. Menkovski, D. Metafas, “AI Model for Computer games based on CBR and AI planning,” 3rd International Conf. on Digital Interactive Media in Entertainment and Arts (DIMEA 2008), pp. 295-302, Sep. 2008.
  • C16. Th. Karachristos, D. Apostolatos, D. Metafas, “A Real-Time Streaming Games-on-Demand System,” 3rd International Conf. on Digital Interactive Media in Entertainment and Arts (DIMEA 2008), pp. 51-56, Sep. 2008.
  • C17. T. Papateodoru, D. Metafas, B. Meparishvili, G. Goderdzishvili, "A Virtual Processor for the Security of MSP430 Equipped Sensor Boards", International Scientific Conference eRA-7, Athens, Sep. 2012
  • C18. D. Goustouridis, E. Kyriakis-Bitzaros, D. Metafas, B. Meparishvili, G. Goderdzishvili, "Non-linear methods applied in sensor networks for environmental monitoring", International Scientific Conference eRA-7, Athens, Sep. 2012
  • C19. D. Metafas, M. Rangoussi, B. Meparishvili, G. Goderdzishvili “Dynamic Applications on Complex Distributed Systems and Machine Learning algorithms”, International Conference on Nanosensory Systems and Quantum Sensory Materials”, Georgia, Jun. 2013
  • C20. V. Choleva, L. Koutsikos, S. Zourelidis, V. Filis, D. Metafas, C. Patrikakis “Safer Internet: Enhancing Good Practices on the Internet through Games Based Learning for Greek Elementary School Students”, 7th European Conference on Games Based Learning ECGBL 2013, Oct. 2013 Porto, Portugal.
  • C21. S.S. Nikolaidis, D.E. Metafas “CORDIC versus conventional logic for realisation of normalised lattice all-pass filters”, IEEE Conf. on Electronics, Circuits, and Systems, 1996. ICECS'96, pp. 538-541, Oct. 1996
  • B1.H. C. Karathanasis, C. N. Dre, D. E. Metafas and S. V. Blionas "On the design of a Baseband Processor for DECT and GSM/DCS1800," Embedded Microprocessor Systems (Book), pp. 453-462, IOS Press, 1996.
  • J1. O. Koufopavlou, D. E. Metafas, and C. E. Goutis "Architectures and VLSI module generator for expressing digital signals in decibels," International Journal of Electronics, Vol. 71, No. 2, pp. 297-307, 1991.
  • J2. D. E. Metafas and C. E. Goutis "A DSP processor with a powerful set of elementary arithmetic operations based on CORDIC and CCM algorithms," Journal of Microprocessing and Microprogramming, No. 30, pp. 51-58, 1990.
  • J3. D. E. Metafas, S. S. Nikolaidis, and C. E. Goutis "Real-time Cepstrum computation based on an advanced CORDIC processor", Journal of Microprocessing and Microprogramming., No. 37, pp. 57-60, 1993
  • J4. D. E. Metafas and C. E. Goutis "A floating-point advanced CORDIC processor," Journal of VLSI and Signal Processing (Elsevier), 10 (1995), pp. 53-65, 1995.
  • J5. D. E. Metafas, E. Mariatos, S. S. Nikolaidis, and C. E. Goutis "Implementation of Given's Rotation processors for DSP real-time applications," Journal of Microprocessing and Microprogramming, No. 38, pp. 351-357, 1993.
  • J6. S. L. Horianopoulos, D. E. Metafas, C. E. Goutis, and T. Deliyannis "A VLSI Synthesis Tool for complementary output delta modulation FIR filters," Journal of Microprocessing and Microprogramming, No. 34, pp. 139-142, 1992.
  • J7. G. P. Economou, S. S. Nikolaidis, D. E. Metafas, and C. E. Goutis "Development of a Technology Independent Library for ASIC design," Journal of Microprocessing and Microprogramming, No. 39, pp.241-244, 1993.
  • J8. L. Bisdounis, D. E. Metafas, A. M. Maras, C. Mavridis "VLSI Implementation of Digit-Serial Arithmetic Modules," Journal of Microprocessing and Microprogramming, No. 39, pp. 251-254, 1993.
  • J9. H. C. Karathanasis, C. N. Dre, D. E. Metafas and S. V. Blionas "Designing a DSP for DECT and GSM/DCS1800 baseband processing," Real Time magazine, 96/3, pp. 22-31, 1996.
  • J10. C. Drosos, M. Zayadine and D. Metafas, "Embedded real-time communication protocol development using SDL for ARM microprocessor," Dedicated Systems Magazine, Jan. 2001.
  • J11. S. Blionas, K. Masselos, C. Dre, C. Drosos, F. Ieromnimon, D. Metafas, T. Pagonis, A. Pneymatikakis, A. Tatsaki, T. Trimis, A. Vontzalidis “Prototyping of a 5 GHz WLAN Reconfigurable System-on-Chip,” IEICE Trans. Inf. & Syst., Vol.E86-D, No. 5 May 2003, pp. 901-909.
  • J12. L. Bisdounis, C. Dre, S. Blionas, D. Metafas, A. Tatsaki, F. Ieromnimon, E. Macii, Ph. Rouser, R. Zafalon and L. Benini, "Low-Power system-on-chip architecture for Wireless LANs," IEE Proc. Computers and Digital Techniques, vol. 151, no. 1, pp. 2-15, Jan. 2004.
  • J13. C. Drosos, D. Metafas, S. Blionas, and G. Papadopoulos, "Rapid prototyping of a wireless LAN implementation using a UML-based system design methodology," IEICE Trans. Inf. & Syst., Vol. E87-D, No.8, Aug. 2004, pp. 2058-2069.
  • J14. C. Drosos, L. Bisdounis, D. Metafas, S. Blionas, A. Tatsaki, G. Papadopoulos, “Hardware-software design and validation framework for wireless LAN modems,” IEE Proceedings Computers and Digital Techniques, vol. 151, no. 3
  • J15. C. Drosos, C. Dre, D. Metafas, D. Soudris, S. Blionas, “The low power analogue and digital baseband processing parts of a novel multimode DECT/GSM/DCS1800 terminal,” Microelectronics Journal (Elsevier), Vol. 35, Issue 7, pp. 609–620, July 2004.
Course name: Structural programming
Course level: Undergraduate
Course type: Compulsory
Teaching: Theory + Laboratory
Hours per week: 2 (lectures) + 2 (lab)
Semester: First
Language: Greek
Web site: http://elect.teipir.gr/courses/HN107

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Course level: Postgraduate
Program: MSc in "Internetworked Electronic Systems"
Course type: Compulsory
Teaching: Theory + Laboratory
Hours per week: 4 (lectures) + 2 (lab)
Semester: First
Language: Greek

Course name: E-learning systems and tele-education technologies
Course level: Postgraduate
Program: Information and Communication Technologies for Education
Course type: Compulsory
Teaching: Theory + Laboratory
Semester: First
Language: Greek

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